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6017c34037cd466297048cd0 74LS164 8-bit Serial Shift Register //d2pyicwmjx3wii.cloudfront.net/s/59c9e4669bd3e7c70c5f5e6c/60a786baccb2521dcaf280c8/webp/ic-chips-ec.jpg

74LS164 - 8-bit Serial In/Parallel Out Shift Register

Features
  • Single 8-bit Shift Register with Gated Serial Inputs and Asynchronous Clear
  • Fully Buffered Clock
  • Clock Frequency up to 36MHz
  • Operating Temperature up to 70oC
  • Standard TTL Switching Voltages
General Description
These 8-bit shift registers feature gated serial inputs and an asynchronous clear. A low logic level at either input inhibits entry of the new data, and resets the first flip-flop to the low level at the next clock pulse, thus providing complete control over incoming data. A high logic level on either input enables the other input, which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is HIGH or LOW, but only information meeting the setup and hold time requirements will be entered. Clocking occurs on the LOW-to-HIGH level transition of the clock input. All inputs are diode-clamped to minimize transmission-line effects.
 
*Image shown is a representation only.

 

TT-ECK-4479
in stock INR 30.68
ELECTRON COMPONENT
1 1

74LS164 8-bit Serial Shift Register

Sku: TT-ECK-4479
₹30.68


Sold By: tenettech
Features
  • Shipping in 10-12 Working days

Description of product

74LS164 - 8-bit Serial In/Parallel Out Shift Register

Features
  • Single 8-bit Shift Register with Gated Serial Inputs and Asynchronous Clear
  • Fully Buffered Clock
  • Clock Frequency up to 36MHz
  • Operating Temperature up to 70oC
  • Standard TTL Switching Voltages
General Description
These 8-bit shift registers feature gated serial inputs and an asynchronous clear. A low logic level at either input inhibits entry of the new data, and resets the first flip-flop to the low level at the next clock pulse, thus providing complete control over incoming data. A high logic level on either input enables the other input, which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is HIGH or LOW, but only information meeting the setup and hold time requirements will be entered. Clocking occurs on the LOW-to-HIGH level transition of the clock input. All inputs are diode-clamped to minimize transmission-line effects.
 
*Image shown is a representation only.