SHOP FOR
http://base-store.storehippo.com/
# 2514/U, 7th 'A' Main Road, Opp. to BBMP Swimming Pool, Hampinagar, Vijayanagar 2nd Stage. 560104 Bangalore IN
Tenettech E-Store
# 2514/U, 7th 'A' Main Road, Opp. to BBMP Swimming Pool, Hampinagar, Vijayanagar 2nd Stage. Bangalore, IN
+918023404924 https://www.componentstores.com/s/59c9e4669bd3e7c70c5f5e6c/ms.settings/5256837ccc4abf1d39000001/59dafe26aef6e1d20402c4c3-480x480.png" [email protected]
68a069da6b651fb5c9b06b5a Sipeed TANG PriMER 20K FPGA Dev. Board https://www.componentstores.com/s/59c9e4669bd3e7c70c5f5e6c/68a069db6b651fb5c9b06b5c/11.jpg

The Sipeed TANG PriMER FPGA Dev. Board is an innovative and versatile platform designed for developers and enthusiasts eager to explore the possibilities of field-programmable gate arrays (FPGAs). With its compact size and powerful capabilities, this board offers a wide range of applications, from embedded system development to digital signal processing and beyond. Equipped with an FPGA chip at its core, it provides ample resources for implementing complex logic designs and custom hardware accelerators. Additionally, the board features various peripheral interfaces, including GPIO pins, USB ports, and HDMI output, facilitating seamless integration with external devices and sensors. Whether you’re a seasoned FPGA engineer or a newcomer to the field, the Sipeed TANG PriMER FPGA Dev. Board offers an accessible yet Tenet Technetronicsst platform for unleashing your creativity and pushing the boundaries of digital innovation.

 

Application scenario:

  1. High-speed communication interface interconnection
  2. Learning, debugging, and researching of soft cores such as RISC-V
  3. Machine vision processing
  4. Parallel computing acceleration

Features:

  • Interface:
  1. FPC40P socket can be connected to RGB LCD, the VGA adapter board
  2. FPC24P socket can be connected to DVP camera, high-speed ADC module
  3. Resistive touch screen controller for I2C interface, used with RGB LCD
  • Pin and lead:
  1. The adjacent pins LVDS are drawn in the same length, leading out 8 GCLKs, and all 8 ADCs are taken out.
  2. Double row pin spacing 900mil, compatible with breadboard development
  3.  The half-hole leads to an extra 40 IO, and the whole board leads to 130+ IO
  • Electrical characteristics:
  1. Micro USB 5V power supply; 2.54mm pin
  2. 3.3V~5V power supply; 1.27mm stamp hole power supply
  3. 3-channel DCDC power supply chip, stable and efficient power supply
  4. independent adjustment of Bank0 IO level

Package Includes:

1 x Sipeed TANG PriMER FPGA Dev. Board

TT-RB-790009
in stockINR 2939
1 1
11.jpg

Sipeed TANG PriMER 20K FPGA Dev. Board

Sku: TT-RB-790009
₹2,939


Sold By: tenettech
Features
  • Shipping in 10-12 Working Days

Description of product

The Sipeed TANG PriMER FPGA Dev. Board is an innovative and versatile platform designed for developers and enthusiasts eager to explore the possibilities of field-programmable gate arrays (FPGAs). With its compact size and powerful capabilities, this board offers a wide range of applications, from embedded system development to digital signal processing and beyond. Equipped with an FPGA chip at its core, it provides ample resources for implementing complex logic designs and custom hardware accelerators. Additionally, the board features various peripheral interfaces, including GPIO pins, USB ports, and HDMI output, facilitating seamless integration with external devices and sensors. Whether you’re a seasoned FPGA engineer or a newcomer to the field, the Sipeed TANG PriMER FPGA Dev. Board offers an accessible yet Tenet Technetronicsst platform for unleashing your creativity and pushing the boundaries of digital innovation.

 

Application scenario:

  1. High-speed communication interface interconnection
  2. Learning, debugging, and researching of soft cores such as RISC-V
  3. Machine vision processing
  4. Parallel computing acceleration

Features:

  • Interface:
  1. FPC40P socket can be connected to RGB LCD, the VGA adapter board
  2. FPC24P socket can be connected to DVP camera, high-speed ADC module
  3. Resistive touch screen controller for I2C interface, used with RGB LCD
  • Pin and lead:
  1. The adjacent pins LVDS are drawn in the same length, leading out 8 GCLKs, and all 8 ADCs are taken out.
  2. Double row pin spacing 900mil, compatible with breadboard development
  3.  The half-hole leads to an extra 40 IO, and the whole board leads to 130+ IO
  • Electrical characteristics:
  1. Micro USB 5V power supply; 2.54mm pin
  2. 3.3V~5V power supply; 1.27mm stamp hole power supply
  3. 3-channel DCDC power supply chip, stable and efficient power supply
  4. independent adjustment of Bank0 IO level

Package Includes:

1 x Sipeed TANG PriMER FPGA Dev. Board