SHOP FOR
http://base-store.storehippo.com/
# 2514/U, 7th 'A' Main Road, Opp. to BBMP Swimming Pool, Hampinagar, Vijayanagar 2nd Stage. 560104 Bangalore IN
Tenettech E-Store
# 2514/U, 7th 'A' Main Road, Opp. to BBMP Swimming Pool, Hampinagar, Vijayanagar 2nd Stage. Bangalore, IN
+918023404924 https://www.componentstores.com/s/59c9e4669bd3e7c70c5f5e6c/ms.settings/5256837ccc4abf1d39000001/59dafe26aef6e1d20402c4c3-480x480.png" [email protected]
5b939884b7167eb27e67cc3c Altera Cyclone V E FPGA Development Kit https://www.componentstores.com/s/59c9e4669bd3e7c70c5f5e6c/ms.products/5b939884b7167eb27e67cc3c/images/5b939884b7167eb27e67cc3d/5b939854ac9e63b27856b060/5b939854ac9e63b27856b060.jpg

Description

The Cyclone® V E FPGA Development Kit offers a comprehensive general purpose development platform for many markets and applications, including Industrial Networking , Military , and Medical applications. The kit features an Intel® Cyclone V device and a multitude of on-board resources including multiple banks of DDR3 and LPDDR2 memory, LCD character display, LEDs, user switches, USB, and RJ-45 connectors. The Cyclone V E FPGA Development Kit gives industrial equipment designers greater flexibility in implementing real-time Ethernet communications with Industrial Ethernet intellectual property (IP) cores.

Development Kit Contents 
The Cyclone V E FPGA Development Kit features the following:

  • Cyclone V E FPGA development board (see figure 1)
    • Featured devices:
      • Cyclone V E FPGA - 5CEFA7F31I7N
      • MAX® V CPLD - 5M2210ZF256I5N (system controller)
      • MAX II CPLD - EPM240M100I5N (embedded USB-BlasterTM II cable)
    • Configuration:
      • On-board USB-Blaster II cable (USB, PHY, MAX V CPLD)
      • JTAG direct via JTAG header
    • Memory devices
      • DDR3 x32 at 300 MHz (soft memory controller)
      • LPDDR2 x16 (soft memory controller)
      • Flash (512 Mb)
      • SSRAM (18 Mb)
      • EEPROM (64 Kb)
    • General user input/output
      • User control
      • Four pushbuttons
      • Five LEDs
      • Four DIP switches
      • 2x Resets (CPU reset, Dev Clear)
      • LCD: Character LCD (16x2)
    • Components and interfaces
      • RJ-45 for Ethernet
      • UART interface
  • Quartus® Prime design software information
    • Quartus Prime Lite editon software

Cyclone V E FPGA Development Board Block Diagram

TT-TS-038
in stock INR 120933.48
FPGA
1 1

Altera Cyclone V E FPGA Development Kit

Sku: TT-TS-038
₹120,933.48


Sold By: tenettech
Features
  • Shipping in 10-12 Working days
  • http://cdn.storehippo.com/s/59c9e4669bd3e7c70c5f5e6c/ms.products/5b939884b7167eb27e67cc3c/images/5b939884b7167eb27e67cc3d/5b939854ac9e63b27856b060/5b939854ac9e63b27856b060.jpg

Description of product

Description

The Cyclone® V E FPGA Development Kit offers a comprehensive general purpose development platform for many markets and applications, including Industrial Networking , Military , and Medical applications. The kit features an Intel® Cyclone V device and a multitude of on-board resources including multiple banks of DDR3 and LPDDR2 memory, LCD character display, LEDs, user switches, USB, and RJ-45 connectors. The Cyclone V E FPGA Development Kit gives industrial equipment designers greater flexibility in implementing real-time Ethernet communications with Industrial Ethernet intellectual property (IP) cores.

Development Kit Contents 
The Cyclone V E FPGA Development Kit features the following:

  • Cyclone V E FPGA development board (see figure 1)
    • Featured devices:
      • Cyclone V E FPGA - 5CEFA7F31I7N
      • MAX® V CPLD - 5M2210ZF256I5N (system controller)
      • MAX II CPLD - EPM240M100I5N (embedded USB-BlasterTM II cable)
    • Configuration:
      • On-board USB-Blaster II cable (USB, PHY, MAX V CPLD)
      • JTAG direct via JTAG header
    • Memory devices
      • DDR3 x32 at 300 MHz (soft memory controller)
      • LPDDR2 x16 (soft memory controller)
      • Flash (512 Mb)
      • SSRAM (18 Mb)
      • EEPROM (64 Kb)
    • General user input/output
      • User control
      • Four pushbuttons
      • Five LEDs
      • Four DIP switches
      • 2x Resets (CPU reset, Dev Clear)
      • LCD: Character LCD (16x2)
    • Components and interfaces
      • RJ-45 for Ethernet
      • UART interface
  • Quartus® Prime design software information
    • Quartus Prime Lite editon software

Cyclone V E FPGA Development Board Block Diagram